The next leap in chip lithography is coming, but the two biggest foundries disagree on when it pays off. Intel, which took delivery of ASML’s first commercial High-NA development unit, the TWINSCAN EXE:5000, for its Hillsboro, Oregon research site, is moving the equipment into its roadmap now, while TSMC is squeezing more from the 0.33-NA machines it already runs in volume.
High-NA EUV runs on the same 13.5-nanometer light as today’s scanners. The optics step up to a 0.55 numerical aperture, sharpening resolution about 1.7 times, which lets some critical layers print in a single pass instead of multiple patterning steps. Intel plans to use it in the 14A generation, which follows 18A.
TSMC says its A16 and A14 nodes can skip High-NA in high volume, relying on better masks, photoresists, overlay control and design-technology co-optimization. Cost is the deciding factor: the new scanners are far more expensive, demand a fresh support ecosystem, and their anamorphic optics cut the exposure field in half, complicating big AI accelerator dies that may need stitching.
The gap is largely one of timing rather than direction. TSMC, ASML’s biggest customer, is developing High-NA for later nodes, and Intel will apply it selectively. Both companies may eventually run the same tools, just at different moments on the path to smaller transistors.
