No memory maker has ever run High-NA EUV in volume production, and Samsung Electronics intends to end that record. The company plans to have ASML’s newest scanners patterning DRAM by 2028, a pairing the two firms flag as a first for the memory business.
High-NA’s sharper imaging gives DRAM a path past the scaling hurdles that standard EUV is starting to hit. Samsung says the technology should extend its process roadmap while simplifying process flows and improving production efficiency at a time when AI demand has memory lines running flat out.
The move also broadens High-NA’s validation base beyond advanced logic. Until now the 0.55-aperture systems have been championed mainly by logic makers, with Intel already shipping a product patterned on the tools and TSMC planning its own ramp later this decade. A volume DRAM application hands ASML proof that the platform pays off in memory economics too.
The pact also puts Samsung inside the push for bigger photomasks, an industry effort to build a 12-inch reticle platform for High-NA’s next phase, where its dual role in memory and foundry gives it a stake in both. Samsung chief executive Young Hyun Jun said the collaboration would help lay the foundation for the next generation of AI and semiconductor innovation, while ASML chief Christophe Fouquet called Samsung one of his company’s most important innovation partners.
The two plan to keep exploring advanced memory technology and new manufacturing approaches together, with the 2028 DRAM target the first concrete date on the table.
