SMIC N+3 chip beats Intel 18A metal pitch without EUV lithography

Analysis shows SMIC's third-generation 7nm node achieves 32.5nm metal pitch and higher density than TSMC N6 using only deep ultraviolet lithography.

ChipNews Staff
1 Min Read

The gap between Chinese semiconductor manufacturing and global leaders is narrowing faster than sanctions intended. A detailed reverse-engineering analysis of SMIC’s third-generation 7nm process, known as N+3, shows the Shanghai-based foundry has achieved a 32.5nm metal interconnect pitch using deep ultraviolet lithography alone.

That figure places SMIC ahead of Intel 18A on this specific metric and above TSMC N6 in transistor density, all without the extreme ultraviolet machines that US export controls prohibit Chinese firms from buying. Intel 18A, which targets roughly 32nm pitch, still holds architectural advantages through gate-all-around transistors and backside power delivery that SMIC’s finFET-based N+3 cannot replicate.

But the comparison shifts the narrative around China’s foundry capabilities. SMIC has effectively compressed what was expected to be a multi-generational gap into roughly one to two process nodes of separation. The N+3 data comes at a sensitive moment in semiconductor geopolitics. US export restrictions were designed in part to keep Chinese foundries several generations behind. SMIC’s progress suggests those controls may be slowing, but not stopping, the country’s chip manufacturing ambitions.

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