Feynman, the GPU generation that follows Rubin, is being built around two big bets: TSMC’s A16 process and a shift to vertical stacking. Trade reports this week say Nvidia has reserved A16 capacity for the architecture, with volume production planned for the second half of 2028.
A16 is the foundry’s 1.6nm node, its first with backside power delivery alongside gate-all-around transistors. Compared with N2P, TSMC’s current leading process, A16 targets 8-10% better density and speed while using 15-20% less power. Production readiness is scheduled for the second half of 2026.
On packaging, Feynman drops the flat chiplet layout in favor of vertical stacks using SoIC. Pairing that with COUPE photonics pushes expected total system bandwidth past 1,000TB/s, roughly twice the 520TB/s planned for Rubin.
The reservation gives TSMC another anchor customer for A16 as Nvidia keeps claiming the front edge of its capacity. It also sets up a real-world test of backside power delivery at AI accelerator scale.
Nvidia has not confirmed the timeline publicly, and the supply chain reports leave room for adjustment as capacity plans shift.
