Taiwan sets aside NT$300B to grow its own chip design tools

A decade-long plan funds next-generation chip design, homegrown EDA software and a sub-1nm process verification line.

ChipNews Staff
1 Min Read

Taiwan will spend NT$300B (US$9.51B) on semiconductor research through 2033, under a Cabinet plan targeting next-generation chip design and advanced manufacturing.

The money flows through two projects in the Taiwan Chip-based Industrial Innovation Program, scheduled from 2024 to 2028. One covers shared infrastructure: seven university semiconductor institutes get equipment subsidies, tied together by a single service platform. The second pays for chip design software, the layer where American EDA vendors hold sway.

Two institutes under the National Institutes of Applied Research separately plan an atomic-scale verification line for sub-1nm processes, which would let local teams test transistor concepts without sending work overseas.

The design-software line is the more strategic bet. Taiwan fabricates most leading-edge logic but drafts it with foreign tools, a dependency that export controls have made visible across the industry. Engineers, not buildings, are the constraint.

Cabinet officials presented the package at a meeting chaired by Premier Cho Jung-tai, and the National Science and Technology Council said the university hardware would be pooled rather than duplicated site by site.

Spreading the money across a decade means results arrive slowly. The near-term measure is whether the shared platform draws enough specialists into advanced-node work.

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