Keysight Technologies and WIN Semiconductors have launched a joint MMIC design workflow aimed at eliminating costly tapeout failures for gallium nitride (GaN) RF components.
The problem with first-pass tapeout
A single failed tapeout can cost weeks of development time and require an expensive foundry re-spin. For companies designing GaN monolithic microwave integrated circuits (MMICs) for 5G base stations, satellite payloads, and defense radar systems, these delays directly impact time-to-market and revenue.
The new workflow integrates on-chip multi-domain simulation, 3D layout verification, and off-chip evaluation board design into a single environment. This ensures no critical analysis step is skipped before submission to the foundry.
Bridging chip and board performance
MMIC customers will not commit to volume purchases until they can measure performance on a physical evaluation board—which includes the MMIC, packaging, PCB, and test connectors. The workflow allows engineers to co-design and optimize these on-chip and off-chip components simultaneously, so system-level performance meets specifications as verified with test equipment.
With the global GaN RF device market projected to reach $2.77 billion by 2031, design houses that cannot prove evaluation board performance risk losing their share of that growth.
The technical foundation
WIN’s latest NP 120P GaN process design kit (PDK) provides designers with accurate process models and layout rules. These models run within Keysight Advanced Design System (ADS) and RF Circuit Simulation Professional, automating the full simulation, optimization, and verification flow required for first-pass MMIC success.
“By combining Keysight’s ADS expertise with WIN’s robust PDK and advanced process technology, we provided a comprehensive verification solution that streamlined the customer’s design flow and accelerated time-to-market,” said Richard Kuo, WIN’s director of design service.
Forward-looking significance
This collaboration directly addresses a critical bottleneck in GaN MMIC development: the gap between chip design and system-level validation. As 5G, satellite, and defense applications demand ever-higher frequencies and power densities, design houses that adopt integrated workflows like this will gain a measurable competitive advantage. The partnership signals that the industry is moving toward a “design once, verify fully” paradigm—reducing risk, shortening cycles, and enabling faster deployment of next-generation RF systems.
