Engineers can now embed post-quantum cryptographic algorithms directly into system-on-chip (SoC) designs using embedded FPGA (eFPGA) blocks, offering a flexible approach to quantum-resistant security at the silicon level.
The approach addresses a growing concern across the semiconductor industry: the cryptographic algorithms that protect today’s chips, from secure boot to data encryption, will be vulnerable to future quantum computers running Shor’s algorithm. The transition to post-quantum cryptography (PQC) requires hardware-level support, but the exact standards are still evolving.
EFPGAs solve this dilemma by providing programmable logic fabric embedded within an SoC. Instead of committing to a fixed cryptographic accelerator that may become obsolete, designers can load and update PQC algorithms as standards mature. This flexibility is particularly valuable for long-lifetime devices such as automotive chips, industrial controllers, and infrastructure hardware that may remain in the field for a decade or more.
The approach also allows designers to implement multiple PQC algorithms on the same silicon, hedging against the possibility that any single algorithm could be broken by advances in cryptanalysis or quantum hardware.
As the National Institute of Standards and Technology finalizes its PQC standards, chip designers face pressure to integrate quantum-resistant security into new tapeouts. EFPGA-based PQC offers a path forward that balances security, performance, and adaptability without requiring a complete silicon respin when standards change.
