Japan’s trade ministry has signed off on a plan change that will make TSMC’s second Kumamoto factory the country’s first 3nm production site. The Ministry of Economy, Trade and Industry said on Friday that it agreed to the revised proposal from Japan Advanced Semiconductor Manufacturing, the TSMC-led venture.
The revision is a substantial rewrite. When the second fab was first proposed it was to run 12nm and 6nm wafers at 48,000 a month. The approved version moves to 3nm technology and cuts planned volume to 6,000 wafers a month, according to reporting in the Asahi Shimbun. Final numbers will depend on how large a subsidy Tokyo ends up granting.
The change reaches back to the first Kumamoto fab as well. That plant will stop making 12nm to 16nm chips and switch to 22nm to 28nm, running 45,000 wafers a month. The Asahi report ties part of the rethink to rising demand for silicon used in AI products.
Operation is scheduled for December 2028. The original package of support was put at about NT$150B.
For TSMC the approval clears the last regulatory hurdle on a site that has moved quickly. The Kumamoto venture began volume production at its first fab in late 2024, and the second building has been the subject of negotiation over technology and money since early this year.
For Japan the trade-off is a much smaller fab than originally budgeted but one that sits at the leading edge rather than several nodes back. That matters for a government that has spent heavily to rebuild a domestic logic base, and it puts a 3nm line on Japanese soil years before Rapidus is due to deliver its own.
