High-bandwidth memory is heading into uncharted business territory. With HBM4, the base die at the bottom of each stack is moving from DRAM-class processes to modern finFET logic nodes, which means a logic foundry will manufacture it while the memory maker assembles the stack.
The bigger shift is what comes next. HBM4 and its successors let chip designers replace that standard base die with a customized version tuned to specific workloads, a model the industry calls custom HBM, or cHBM. The memory layers stay standard; the controlling logic can be tailored, and companies can adapt memory as part of a wider XPU customization program.
Synopsys director Rob Kruger said differentiation is the main draw, pointing to the cHBM model as a way for chip and system builders to set their products apart when memory supply is tight.
The early market is expected to be hyperscalers, which have the budget, run a narrow set of workloads and cannot wait for standards bodies. Marvell’s Khurram Malik said JEDEC standardization moves too slowly for hyperscalers, who are adapting base dies to their own workloads at a much faster pace. Enterprise customers building their own XPUs are also starting to evaluate the model.
Open questions remain over who designs the custom base die, who manufactures it and who assembles the final stack. The answers will shape whether cHBM becomes a niche for the biggest cloud firms or a broader market.
