Semiconductor startup TYLsemi emerged from stealth on July 14 with $43 million in seed funding, launching what it calls the industry’s first pure-play chiplet platform company. Based in San Jose, TYLsemi aims to bridge the gap between traditional ASIC houses and design service providers by taking on the development and integration risk of multi-die designs.
The company offers a full portfolio of pre-verified chiplet tiles spanning I/O, power delivery, and memory, combined with a chiplet-based custom silicon design service. This model lets AI chip startups access advanced multi-die packaging without the multi-year development cycles and high upfront costs typically required.
TYLsemi’s approach addresses a critical pain point: as monolithic die sizes grow prohibitively expensive at advanced nodes, chiplets offer a path forward, but the ecosystem remains fragmented. TYLsemi standardizes the chiplet interface and handles integration, packaging, and supply chain logistics.
The seed round was led by a syndicate of semiconductor-focused venture firms. The startup plans to use the capital to expand its chiplet IP library, hire engineering talent, and secure initial customer engagements with AI inference chip designers.
