EdgeCortix has taken the wraps off RAIDEN, a chiplet family that scales from a single compute die to a four-die flagship without forcing a change in the software underneath.
The company positions the part for what it calls physical AI at the thick edge: machines that perceive and act in the field, where compute, memory capacity, memory bandwidth and connectivity all have to grow together.
At the four-die configuration the platform is rated for 3.36 PFLOPS of FP4 inference, 256GB of memory and 548 GB/s of memory bandwidth. Aggregate die-to-die bandwidth reaches 1.54 TB/s over UCIe links, with chip-to-chip scale-out of up to 6.4 Tb/s for systems that outgrow a single package.
All three configurations share the DNA-X accelerator and the MERA 3.0 compiler stack, so a design can move between performance classes without a rewrite.
EdgeCortix says RAIDEN arrives with design wins already booked in aerospace and defence, robotics and high-performance edge servers. Part of the work behind it traces to a state-backed project on post-5G compute.
