Rebellions bets on memory-centric architecture as it weighs IPO options

South Korean AI silicon startup Rebellions is pivoting to memory-centric architectures, leveraging strategic ties with SK Hynix and Samsung Foundry as it evaluates IPO options.

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South Korean AI silicon startup Rebellions is pivoting to memory-centric architectures, leveraging strategic ties with SK Hynix and Samsung Foundry as it evaluates IPO options.

Memory as strategic priority

As large language models reach deployment scale, memory capacity and bandwidth have become critical bottlenecks for AI inference accelerators. Rebellions’ second-generation chip, Rebel, delivers 1 POPS of FP16 compute with 144 GB of HBM4e in a 300-W power envelope, underscoring the centrality of memory performance.

CEO Sunghyun Park told EE Times that the industry is moving beyond commodity memories. Large KV caches will require a combination of HBM and high-bandwidth flash, while scale-up and scale-out solutions demand specialized memory architectures and pooling. Rebellions has shifted from planned 3D SRAM stacks to 3D-stacked DRAM, co-designed with both SK Hynix and Samsung.

“There’s no de facto standard solution yet, so it’s a good time to explore what options we can have in the base die for custom HBM,” Park said.

Customer base and regional focus

Rebellions has commercialized Rebel primarily in South Korea and the Middle East. In the Kingdom of Saudi Arabia, sovereign AI ambitions are driving demand for heterogeneous compute platforms where NVIDIA and non-NVIDIA hardware coexist.

“The beauty of Rebellions is we can secure all the memory,” Park said, noting that supply chain security is paramount. Telecoms remain a key vertical: SK Telecom runs a multi-rack Rebellions cluster powering A-DoT, its proprietary AI assistant handling up to 50 million API calls daily. Korea Telecom also deploys Rebellions hardware in NPU-as-a-service infrastructure.

The U.S. market remains nascent, though Rebellions’ open-source software stack, optimized for Red Hat, has drawn interest.

Chiplet architecture and disaggregation

Rebellions recently taped out CXL and Ethernet I/O dies, but plans to sell compute chiplets are still evolving. The company collaborates with Marvell on system-level technologies, including optical scale-up, and is considering co-packaged optics for future generations.

Disaggregated inference—splitting workloads across specialized chips—is gaining traction following the NVIDIA-Groq deal. Rebellions is working with Arm and SK Telecom on a disaggregation project where its hardware accelerates the decode stage, leveraging significant on-chip SRAM.

“One year ago, the magic word was chiplet. Today, the magic word is memory and memory-centric architectures,” Park said.

Forward-looking conclusion

Rebellions is positioning itself at the intersection of memory innovation and sovereign AI infrastructure, a strategy that could differentiate it in a crowded market. As the industry moves toward custom HBM, disaggregated inference, and heterogeneous compute, the company’s Korean ecosystem ties and memory-centric roadmap may prove decisive—especially as it weighs the timing and structure of a potential IPO.

SOURCES:EE Times
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