The AI boom is a bandwidth beast, and it’s never full. Today, Acacia—Cisco’s optical engine room—unleashed a new arsenal of chips and photonics designed to slake that thirst without melting the data center floor. The headline act is a 3nm Kibo 1.6T PAM4 DSP, a chip that promises to cut power consumption by over 20% compared to current 1.6T modules. That’s not just an incremental tick; it’s a lifeline for hyperscalers wrestling with AI workloads that are as power-hungry as they are data-gluttonous.
The Silicon Photonics Play
Acacia isn’t new to this game. They’ve already shipped over a million 100G-per-lane optical engines in the last year alone. Now they’re cranking it to 200G per lane with a family of optical engines that pair with the new DSP. These aren’t just faster; they’re smarter, leveraging Acacia’s decade-plus of silicon photonics expertise to pack more lanes—DR4, DR8, 2xFR4—into the same OSFP and QSFP-DD form factors. The result? Pluggable modules that can handle the compute-intensive grunt of AI training and video streaming without turning into space heaters.
The Market’s New Muscle
Industry analyst LightCounting predicts the optical chipset market will grow at a 17% CAGR through 2030. That’s a lot of light pulses. Acacia’s move is perfectly timed: as hyperscalers scramble to upgrade infrastructure, they need a supplier with proven volume manufacturing and a deep bench in DSP. “Having a new supplier with Acacia’s credibility is key for continuing innovation,” says LightCounting’s Vladimir Kozlov. Translation: the old guard is getting a serious challenger.
What This Means
Acacia isn’t just shipping components; it’s laying the optical foundation for the next wave of AI. With Cisco’s full backing and a 3nm chip sampling later this year, the message is clear: the fiber backbone of the AI era is getting a serious upgrade. The only question left is whether the rest of the industry can keep up.
