SiPearl and Semidynamics partnered to co-develop Europe’s first sovereign rack-scale AI platform, combining Arm-based CPUs with RISC-V accelerators to reduce reliance on non-European suppliers.
Platform Architecture
The multi-generation platform leverages SiPearl’s Arm Neoverse V2-based Rhea2 processors for general-purpose and orchestration tasks. Semidynamics provides RISC-V-based AI inference accelerators—described as programmable GPU/AI inference ASICs—as the primary compute engines. Rhea2, still in design, will use only DDR-type memory, simplifying coherence with accelerators compared to its predecessor’s complex HBM and DDR5 memory subsystem.
The accelerators build on Semidynamics’ existing Cervell NPU architecture, combining RISC-V CPU control, vector and tensor capability, and a differentiated memory subsystem. This design targets large-scale inference workloads, including large models and long contexts, without locking customers into fixed-function hardware.
Integration and Coherence
First-generation integration pairs SiPearl CPUs with Semidynamics accelerators as discrete components. Future generations will pursue tighter chiplet-level integration using UCIe interconnect, echoing heterogeneous multi-chiplet designs like AMD’s Instinct MI300A, though the companies emphasize architectural differences will yield a distinct result.
A key challenge is enabling full CPU-accelerator memory coherence. SiPearl confirmed the first-generation platform will support this, despite the inherent trade-offs: coherence traffic increases power consumption, latency, area overhead, and verification complexity. Even advanced systems from AMD and Nvidia typically use hybrid coherence models, limiting coherent memory regions to maintain performance.
Software and Ecosystem
Semidynamics has not disclosed specific RISC-V instructions or data formats, but confirmed the accelerators will be programmable using standard tools: Linux, GCC, and LLVM. This open approach avoids proprietary software lock-in. The platform will follow Open Compute Project (OCP) specifications to ensure compatibility with existing cloud and data center infrastructure, from SSDs to server racks and power supplies, reducing deployment friction and time to market.
Forward-Looking Significance
This partnership signals Europe’s strategic push to build a sovereign AI hardware stack, addressing a critical gap versus the U.S. and China. By combining Arm’s proven CPU ecosystem with RISC-V’s openness and programmability, SiPearl and Semidynamics aim to deliver competitive rack-scale performance and efficiency. Success will depend on executing coherent chiplet integration and maintaining software flexibility—key factors that will determine whether Europe can establish a credible, independent position in the global AI infrastructure market.
