Custom inference silicon often stumbles in the deployment stage rather than the design stage. d-Matrix wants its next-generation Raptor parts to skip that problem entirely.
The route runs through NVLink Fusion, an interface for attaching outside accelerators to the company’s own rack platform. Raptor parts also pick up Spectrum-X scale-out networking and the MGX rack architecture that Nvidia’s partner base already builds against.
Sid Sheth, d-Matrix cofounder and chief executive, told a press briefing that what limits buyers today is not ambition but the money, schedule and power available to them. He argued the combination gives customers a faster, lower-risk route to deploying accelerators inside a liquid-cooled architecture that is already widely installed.
Nvidia’s pitch centers on everything that comes after tape-out. Finishing a chip is the easy part.
Turning it into a product means sourcing the silicon, wiring up high-speed interfaces, proving out scale-up networking and getting rack designs certified. Each of those stages carries its own cost, schedule slip and technical risk.
NVLink Fusion exists to carry third-party XPUs and CPUs into Nvidia’s networking and software stack, letting partners adopt a platform that has already been validated instead of building one from scratch.
d-Matrix is the latest addition to that list, a sign of how the AI server market is splitting between Nvidia’s own accelerators and chips designed in-house by customers.
