China’s CXMT is building eight-high HBM at yields of roughly 25 percent, according to a Chosun Ilbo report that cited an unnamed semiconductor equipment executive.
The figure splits into two stages. Front-end wafer processing yields about 30 percent, and of the stacks that reach assembly, only around 70 percent survive final test. Multiplied together, the two steps leave roughly three of every four parts unusable.
The report attributes the gap to through-silicon via maturity, the process that forms the vertical connections between stacked DRAM dies. More layers mean tighter alignment and hole-quality tolerances. SK hynix, which began HBM production in 2022, has run yields above 90 percent since then.
CXMT has never published HBM yield data and did not confirm the numbers. Its public record looks stronger elsewhere. The memory maker recently passed 10 percent of global DRAM revenue share and used an earnings briefing to preview LPDDR6 output and progress on domestic DUV lithography.
HBM is where the gap is hardest to hide. The stacked memory is the costliest input in an AI accelerator, and the reason Chinese chip designers are now pushing price increases through to customers.
For Beijing the yield number matters more than any single launch. Without competitive HBM, domestic accelerators stay dependent on imported memory or run at lower bandwidth than NVIDIA parts.
