Celero Communications has closed a $275M Series C at a valuation above $3B, weeks after proving out the 2nm coherent DSP silicon it hopes will carry AI data center links toward 3.2T speeds. The Irvine, California startup has now raised $415M in total, with Alphabet’s CapitalG joining Atreides Management and Valor Equity Partners in the round.
Founded in 2024, Celero says the validation makes its chip the first 2nm coherent DSP to reach silicon. The design blends digital signal processing with advanced analog circuitry to cut power while pushing bandwidth density beyond today’s 1.6T optical modules.
AI campuses are straining the limits of traditional short-reach optical transceivers, and that pressure is pulling coherent technology out of its long-haul telecom stronghold and toward data center floors. The startup’s founders, veterans of Marvell, Inphi, Broadcom and ClariPhy, are steering the roadmap across scale-up, scale-out and scale-across fabrics, where Marvell is also fielding 2nm coherent DSPs for 1.6T ZR/ZR+ optics.
Next come product specifications, customer sampling and production readiness, with the fresh capital meant to carry Celero from silicon validation to commercial shipments as AI builders race to ease interconnect bottlenecks.
