TSMC is weighing price increases of as much as 20 percent on its CoWoS advanced packaging, according to supply chain sources cited by Taiwan’s Commercial Times, with lead times stretching and unfilled orders piling up.
CoWoS is the interposer process sitting between an AI accelerator die and its stacks of high-bandwidth memory. Every large GPU and custom accelerator shipping today passes through it, which makes its price a direct input into the cost of an AI rack rather than a detail buried in a bill of materials.
Demand has spread past GPUs
The squeeze is no longer only about Nvidia and AMD accelerators. Server CPUs and custom ASICs now compete for the same packaging lines, and longer test cycles for complex AI parts consume capacity that used to turn over faster.
The constraint has moved upstream too. Equipment lead times have lengthened to six to eight months from three to six, as customers prioritise delivery slots over price. TSMC itself reportedly placed equipment orders this year at existing prices without seeking the discounts it usually extracts – unusual for a buyer of its weight.
The wider price ladder
Packaging is not the only line moving. The Liberty Times reports TSMC settled on wafer increases of 3 to 6 percent from January 2027, tiered by node, with 2nm and 3nm at the top.
Capacity is being added. Analysts cited by Commercial Times expect monthly CoWoS output to pass 130,000 wafers in 2026 and target 200,000 in 2027. Goldman Sachs models a steeper curve, projecting about 106,000 wafers a month this year before a 114 percent jump in 2027.
For chip designers, the message is that the packaging step – long treated as back-end plumbing – is now a scarcity good priced accordingly.
