Waymo’s robotaxi brain gets a purpose-built 5nm ASIC

Waymo details the 5nm ASIC that fuses its robotaxi sensor streams.

ChipNews Staff
1 Min Read

Waymo has pulled back the curtain on the custom silicon inside its next-generation self-driving compute stack, revealing a purpose-built 5nm ASIC that the company detailed at Hot Chips.

The chip is an ML powerhouse designed to process, fuse and run neural networks on raw lidar, radar and camera data before it reaches the core model brain. Dedicated accelerators handle temporal denoising for low-light perception, and a purpose-built inference engine runs the sensor-fusion models that turn pixels into driving commands.

By co-designing silicon with its sensors and algorithms, Waymo said it can process high-fidelity feeds from 13 high-resolution cameras simultaneously and in real time. The compute system is engineered for deterministic low-latency performance, rides the vehicle’s liquid cooling loop, and is built as two independent engines so one can take over if the other faults.

The ASIC is just one of several custom components in development, the company said. Waymo continues to work with partners including AMD, Micron, NVIDIA, Samsung, SanDisk, Socionext and TSMC as it scales the Waymo Driver.

The disclosure marks a shift from off-the-shelf parts to fully custom systems as Alphabet pushes deeper into in-house silicon for its AI businesses.

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