RISC-V is moving beyond embedded controllers and into the data center. At the RISC-V Summit Europe 2026 in Bologna, SiFive chief architect and RISC-V International lead Krste Asanovic declared that RVA23-profile server silicon is arriving this year, marking the open ISA’s most serious challenge to x86 and Arm in enterprise computing.
The RVA23 standard, approved in October 2024, provides a common profile that lets software developers test directly on real hardware rather than emulators. Asanovic told the audience that hyperscalers including Google, Meta, and Alibaba are investing in RISC-V server processors, drawn by the architecture’s flexibility in both technical features and business model.
“This gives you this unique opportunity to innovate and handle many different workloads, but in all new ways, all with a standard framework underpinning it,” Asanovic said during his keynote.
Key technical advances include optimization guidance options like Oilsm and Ovlt, which set performance expectations for features such as misaligned memory access handling, telling hardware vendors they must support these efficiently to remain competitive. The ISA is also expanding security through CHERI capability hardware extensions, implemented as new base ISAs RV32Y and RV64Y rather than bolt-on extensions.
For chip companies, RISC-V’s server push opens a third architecture option alongside x86 and Arm, potentially reshaping licensing economics and processor design cycles across the data center market over the next three to five years.
