AI’s memory squeeze has a packaging answer, according to a startup that just left stealth. TeRAM raised $37M to develop 3D SRAM that sits on top of AI compute dies, arguing that the binding constraint has shifted from how much memory a system can hold to how fast it can be reached.
Primary Venture Partners led the round. Its partner Brian Schechter said the founder connects AI architecture, memory physics and semiconductor manufacturing, and that incremental gains will not close the gap.
That claim rests on how the bottleneck moved. Training pushed HBM capacity to its limits. Agentic inference, which now drives most token generation, forces every output token through the entire model, so the limit is bandwidth between logic and memory rather than raw storage.
Building SRAM into the compute die shortens that path, though heat becomes the hard part. TeRAM says its memory and packaging work is designed around those thermal conditions, targeting the lowest power per bit it can reach.
Validation is under way. Initial customer production is targeted for 2029, a long runway even by semiconductor standards, and the company is courting builders of models beyond two trillion parameters.
Investors have backed several swings at the same wall this month. Kepler Computing raised $468M for ferroelectric memory. Positron AI landed $875M for memory-first inference silicon. Both argue that memory now sets the pace.
