India has officially notified Semicon 2.0, a $15B follow-on to its first chip incentive program, with fabrication support trimmed to 40 percent of capex from 50 percent under the original scheme.
The notification, published August 31, spreads the outlay of about 1.27 lakh crore rupees across six pillars and ten categories spanning fabs, assembly and test, machines and materials, and chip design. Equipment and materials makers qualify for 30 percent capex support plus a five-year production-linked incentive of 2 to 10 percent on domestic bill of materials starting fiscal 2028-29.
The India Semiconductor Mission will run appraisal and oversight, with a high-level panel empowered to handpick strategic chip categories for incentives. Minister Ashwini Vaishnaw said the government aims to train 100,000 more semiconductor engineers and expects the program to create 50,000 to 60,000 direct jobs.
The expansion follows production milestones from the first phase, including Micron’s assembly and test plant in Gujarat and projects from CG Power and Tata, and sets an eight-year roadmap toward domestic capability at 7nm to 3nm nodes.
Officials framed the scheme as a supply-chain resilience and national security measure as New Delhi courts foreign investors and pushes local champions.
